LCEVC Encoder IP Core

V-Nova's LCEVC Encoder IP core is a versatile solution that supports video resolutions up to 8K at frame rates up to 60 fps. It includes V-Nova's unique pre-processing and rate control enhancements to deliver exceptional video compression performance. It has been compiled for and verified on Xilinx Alveo U50 and U250 boards, guaranteeing reliability and performance.

By leveraging the LCEVC Encoder IP core, you can easily incorporate LCEVC encode capability into your next generation video SoC and take advantage of its enhanced video coding capabilities.

Design Features of the V-Nova LCEVC Encoder IP

The V-Nova LCEVC Encoder IP core has been designed to address the video encoding needs of different applications and SOC architectures:

MPEG-5-part2 LCEVC Specification Compliance

Foremost among these features is the Encoder IP's compliance with the MPEG-5-part2 LCEVC specification (ISO/IEC 23094-2).

Adaptable Integration Architecture

The Encoder IP has been designed with adaptability in mind. This includes the parametrization of vital metrics such as maximum resolution, performance throughput, latency, logic area, and DDR bandwidth availability. This flexible approach enables integrators to tailor the Encoder IP's configuration to align precisely with their project's unique requirements.

High Performance

The Encoder IP design can support a maximum throughput of 8K resolution at 120 frames per second, at 4:2:0 bit depths of 8, 10 or 14.

Further details available on request.

Last updated