LCEVC Decoder IP Core Deliverables

The V-Nova LCEVC Decoder IP package contains the following and can be made available on V-Nova's Download Portal upon request:

• RTL source code ​

  • Verilog & System-Verilog code base​

• Example C control software​

  • Host driver code fully integrated with FFmpeg​

• Bit accurate executable software reference model​

  • MPEG-5 LCEVC software decoder reference model (with built-in RTL vector generation hooks)​

• Documentation​​

  • Block and system level specification and architectural descriptions​

• Simulation test benches ​

  • System Verilog behavioural test benches for RTL and gate-level verification​

• Integration support ​

  • Basic conformance stream set

  • Design and development support by V-Nova Integration Services team

  • Compliance and performance test suite​ (available from V-Nova partners)

  • On-going technical support​ (optional)